Method for fabricating an integrated circuit

Details Method for fabricating an integrated circuit Method for fabricating an integrated circuit

2006-10-31

2006-10-31

Nguyen, Thanh (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S599000

Reexamination Certificate

active

07129157

ABSTRACT:
In an integrated circuit having a first circuit part and at least one second circuit part, which is assigned to a specific functionality of the first circuit part, on one and the same silicon wafer, of which the first circuit part and the at least one circuit part are arranged in non-overlapping, mutually separate regions of the silicon wafer and are connected to one another via connecting elements or lines, during the fabrication, for each exposure plane, with the exception of the exposure plane used for the fabrication of the connecting elements or lines, use is made in each case of a first exposure mask intended for the first circuit part and a second exposure mask intended for the second circuit part. These first and second exposure masks may be arranged on a common reticle for a respective exposure plane.

REFERENCES:
patent: 6406980 (2002-06-01), Amatangelo et al.
patent: 6787904 (2004-09-01), Koyama et al.
patent: 2002/0136046 (2002-09-01), Kim et al.
patent: 2003/0180670 (2003-09-01), Hasegawa et al.
patent: 101 00 344 (2002-07-01), None

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