Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2006-09-26
2006-09-26
Schillinger, Laura M. (Department: 2813)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S680000, C118S715000, C118S728000
Reexamination Certificate
active
07112544
ABSTRACT:
The invention includes a method for treating a plurality of discrete semiconductor substrates. The discrete semiconductor substrates are placed within a reactor chamber. While the substrates are within the chamber, they are simultaneously exposed to one or more of H, F and Cl to remove native oxide. After removing the native oxide, the substrates are simultaneously exposed to a first reactive material to form a first mass across at least some exposed surfaces of the substrates. The first reactive material is removed from the reaction chamber, and subsequently the substrates are exposed to a second reactive material to convert the first mass to a second mass. The invention also includes apparatuses which can be utilized for simultaneous ALD treatment of a plurality of discrete semiconductor substrates.
REFERENCES:
patent: 4058430 (1977-11-01), Suntola et al.
patent: 4341818 (1982-07-01), Adams et al.
patent: 4389973 (1983-06-01), Suntola et al.
patent: 4632058 (1986-12-01), Dixon et al.
patent: 5251667 (1993-10-01), Kunz et al.
patent: 5281274 (1994-01-01), Yoder
patent: 5567267 (1996-10-01), Kazama et al.
patent: 5618349 (1997-04-01), Yuuki
patent: 5879459 (1999-03-01), Gadgil et al.
patent: 6024799 (2000-02-01), Chen et al.
patent: 6124158 (2000-09-01), Dautartas et al.
patent: 6144802 (2000-11-01), Kim
patent: 6147013 (2000-11-01), Sun et al.
patent: 6174809 (2001-01-01), Kang et al.
patent: 6306216 (2001-10-01), Kim et al.
patent: 6321680 (2001-11-01), Cook et al.
patent: 6342277 (2002-01-01), Sherman
patent: 6468924 (2002-10-01), Lee et al.
patent: 6491518 (2002-12-01), Fujikawa et al.
patent: 6579372 (2003-06-01), Park
patent: 6585823 (2003-07-01), Van Wijck
patent: 6592942 (2003-07-01), Van Wijck
patent: 6514870 (2003-09-01), Rossman
patent: 6673701 (2004-01-01), Marsh et al.
patent: 6753271 (2004-06-01), Sarigiannis et al.
patent: 6764916 (2004-07-01), Furukawa et al.
patent: 6802712 (2004-10-01), Bernhardt et al.
patent: 6831004 (2004-12-01), Byun et al.
patent: 6835674 (2004-12-01), Doan et al.
patent: 6838125 (2005-01-01), Chung et al.
patent: 6890596 (2005-05-01), Sarigiannis et al.
patent: 6897119 (2005-05-01), Sneh et al.
patent: 6907897 (2005-06-01), Maula et al.
patent: 6916398 (2005-07-01), Chen et al.
patent: 6939579 (2005-09-01), Bondenstam, et al.
patent: 6941963 (2005-09-01), Maula et al.
patent: 2002/0043216 (2002-04-01), Hwang et al.
patent: 2002/0086476 (2002-07-01), Kim
patent: 2002/0098627 (2002-07-01), Pomarede et al.
patent: 2003/0013320 (2003-01-01), Kim et al.
patent: 2003/0036268 (2003-02-01), Brabant et al.
patent: 2003/0040196 (2003-02-01), Lim et al.
patent: 2003/0209193 (2003-11-01), Van Wijck
patent: 2004/0026037 (2004-02-01), Shinriki et al.
patent: 1 069 599 (2001-01-01), None
patent: 2001 172 767 (2001-06-01), None
patent: 2002060947 (2002-02-01), None
Wolf, et al., Silicon Processing for the VLSI Era, vol. 1—Process Technology, Lattice Press: Sunset Beach CA 1986, pp. 169-170.
Kukli et al., “Atomic Layer Epitaxy Growth of Tantalum Oxide Thin Films from Ta(OC2H5)5and H2O”, Journal of the Electrochemical Society 142(5), May 1995, pp. 1670-1674.
Kukli et al., “Properties of Ta2O5-Based Dielectric Nanolaminates Deposited by Atomic Layer Epitaxy”, Journal of the Electrochemical Society 144(1), Jan. 1997, pp. 300-306.
Niinisto, “Advanced Thin Films for Electronics and Optoelectronics by Atomic Layer Epitaxy”, IEEE, Jun. 2000, pp. 33-42.
Suntola, “Surface chemistry of materials deposition at atomic layer level”, Applied Surface Science 100/101, 1996 Elsevier Science, pp. 391-398.
Siimon et al., “Modeling of Precursor Flow and Deposition in Atomic Layer Deposition Reactor”, Journal de Physique IV, vol. 5, Jun. 1995, tile page and pp. C5-245 to C5-252.
Breiner Lyle D.
Doan Trung Tri
Ping Er-Xuan
Zheng Lingyi A.
Micro)n Technology, Inc.
Rodgers Colleen E.
Schillinger Laura M.
Wells St. John P.S.
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