Method to produce low strength temporary solder joints

Details Method to produce low strength temporary solder joints Method to produce low strength temporary solder joints

2006-08-08

2006-08-08

Elms, Richard (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S613000, C438S615000, C438S669000, C438S670000, C438S671000, C438S109000, C257SE21509

Reexamination Certificate

active

07087513

ABSTRACT:
The present invention provides a method for producing a temporary chip carrier for semiconductor chip burn-in test and speed sorting. A multi-layered substrate or card, usually comprised of one of various materials is made by offsetting the conductor-filled vias or holes in the outer few layers with the outer most layer not being filled with a conductor, such that a partially filled via or hole is produced. This effectively produces a smaller surface conductor feature, on which the semiconductor chip is temporarily attached, electrically tested, and subsequently removed using various methods, at forces much lower than normal chip removal processes require.

REFERENCES:
patent: 5237269 (1993-08-01), Aimi et al.
patent: 5574386 (1996-11-01), Beaumont et al.
patent: 5931685 (1999-08-01), Hembree et al.
patent: 2005/0062142 (2005-03-01), Yeh et al.

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