Electronic devices comprising bottom-gate TFTs and their...

Details Electronic devices comprising bottom-gate TFTs and their... Electronic devices comprising bottom-gate TFTs and their...

Filed on

2006-09-05

Date issued

2006-09-05

Examiner

Smith, Bradley K. (Department: 2891)

Patent Class

Semiconductor device manufacturing: process

SubClass

Making field effect device having pair of active regions...

SubSubClass

On insulating substrate or layer

Other Related Categories

C438S166000, C438S151000, C257S072000, C349S046000

Type

Reexamination Certificate

Status

active

Patent number

07101740

Description

ABSTRACT:
A method of manufacturing an electronic device comprising a bottom-gate TFT (12) is provided, the method comprising the steps of: forming a doped amorphous silicon gate layer (26′) on a substrate, the gate layer defining a gate (26), forming a gate insulating layer (32) over the gate, forming an amorphous silicon active layer (28′) over the gate insulating layer and overlying at least part of the gate, and annealing the amorphous silicon active layer to form a polysilicon active layer (28). A thinner gate insulating layer can be used giving a TFT having a low threshold voltage.

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