Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2006-04-04
2006-04-04
Schillinger, Laura M. (Department: 2813)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S787000, C438S240000
Reexamination Certificate
active
07022623
ABSTRACT:
A method of fabricating a semiconductor device includes depositing a dielectric film and subjecting the dielectric film to a wet oxidation in a rapid thermal process chamber. The technique can be used, for example, in the formation of various elements in an integrated circuit, including gate dielectric films as well as capacitive elements. The tight temperature control provided by the RTP process allows the wet oxidation to be performed quickly so that the oxidizing species does not diffuse significantly through the dielectric film and diffuse into an underlying layer. In the case of capacitive elements, the technique also can help reduce the leakage current of the dielectric film without significantly reducing its capacitance.
REFERENCES:
patent: 5374578 (1994-12-01), Patel et al.
patent: 5486488 (1996-01-01), Kamiyama
patent: 5508221 (1996-04-01), Kamiyama
patent: 5534716 (1996-07-01), Takemura
patent: 5661072 (1997-08-01), Jeng
patent: 5663088 (1997-09-01), Sandhu et al.
patent: 5726083 (1998-03-01), Takaishi
patent: 5728603 (1998-03-01), Emesh et al.
patent: 5840368 (1998-11-01), Ohmi
patent: 6063698 (2000-05-01), Tseng et al.
patent: 6066581 (2000-05-01), Chivukula et al.
patent: 6114258 (2000-09-01), Miner et al.
patent: 6197668 (2001-03-01), Gardner et al.
patent: 6875678 (2005-04-01), Jung et al.
patent: 2001/0020725 (2001-09-01), Okuno et al.
patent: 2001/0051406 (2001-12-01), Weimer et al.
patent: 2004/0048491 (2004-03-01), Jung et al.
patent: 2005/0037630 (2005-02-01), Doh et al.
Wolf, et al., Silicon Processing for the VLSI Era, vol. 1: Process Technology, Lattice Press: Sunset Beach CA, p. 57.
Van Zant, Microchip Fabrication, A Practical Guide to Semiconductor Processing, 3rd ed. McGraw-Hill: New York, 1997, pp. 157-160.
Wolf, et al. Silicon Processing for the VLSI Era, vol. 1-Process Technology, 2nd ed., Lattice Press: Sunset Beach CA, 1986, pp. 191-192.
Ghandi, VLSI Fabrication Principles, 2nd ed. John Wiley & Sons: New York, 1994, pp. 465-466.
CRC Handbook of Chemistry and Physics 63rd Edition, CRC Press: Boca Raton FL, pp. D-196 to D-197.
Lu, et al., “Leakage Current Comparison Between Ultra-Thin Ta2O5films and conventional gate dielectrics” IEEE Electron Device Letters 19(9), Sep. 1998, pp. 341-342.
Alers, et al., “Intermixing at the Tantalum Oxide/Silicon Interface in Gate Dielectric Structures” Applied Physics Letters 73(11), Sep. 14, 1998, pp. 1517-1519.
Luan, et al., “Ultra-thin High Quality Ta2O5Dielectric Prepared by In-Situ Rapid Thermal Processing” Electron Devices Meeting, held Dec. 6-9, 1998, IEDM '98 Technical Digest, pp. 609-612.
Al-Shareef Husam N.
DeBoer Scott J.
Gealy Dan
Weimer Ronald A.
Dickstein , Shapiro, Morin & Oshinsky, LLP
Schillinger Laura M.
LandOfFree
Method of fabricating a semiconductor device with a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of fabricating a semiconductor device with a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of fabricating a semiconductor device with a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3612975