Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1996-02-09
1998-08-25
Quach, T. N.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438624, 438631, 438926, H01L 2128
Patent
active
057982988
ABSTRACT:
A method of automatically generating dummy metals for multilevel interconnection makes use of a quantum array pattern accompanying an operating pattern to from a metal pattern. The method comprises the combination selected from intersection (AND), union (OR), oversizing, downsizing, or incorporation operation through computer-aided design (CAD). Therefore, the application of the metal pattern to a process for fabricating a multimetal structure can acquire full planarization between two metal layers because of the arrangement that several dummy metals are positioned among the metal lines to diminish the spacing which exceeds the planarization limit. Also, the dummy metals are shaped in blocks thereby preventing the loading effect during etching and decreasing the parasitic capacitance therebetween.
REFERENCES:
patent: 5441915 (1995-08-01), Lee
patent: 5459093 (1995-10-01), Kuroda et al.
patent: 5597668 (1997-01-01), Nowak et al.
Pan Hong-Tsz
Yang Ming-Tzong
Quach T. N.
United Microelectronics Corporation
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