Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-04-25
2006-04-25
Nguyen, Thanh (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S627000, C438S637000, C438S643000
Reexamination Certificate
active
07033940
ABSTRACT:
A composite α-Ta/graded tantalum nitride/TaN barrier layer is formed in Cu interconnects with a controlled surface roughness for improved adhesion, electromigration resistance and reliability. Embodiments include lining a damascene opening, such as a dual damascene opening in a low-k interlayer dielectric, with an initial layer of TaN, forming a graded tantalum nitride layer on the initial TaN layer and then forming an α-Ta layer on the graded TaN layer, the composite barrier layer having an average surface roughness (Ra) of about 25 Å to about 50 Å. Embodiments further include controlling the surface roughness of the composite barrier layer by varying the N2flow rate and/or ratio of the thickness of the combined α-Ta and graded tantalum nitride layers to the thickness of the initial TaN layer.
REFERENCES:
patent: 2003/0089597 (2003-05-01), Tang et al.
patent: 2005/0118796 (2005-06-01), Chiras et al.
King Paul L.
Marathe Amit
Mei-Chu Woo Christy
Wang Connie Pin-Chin
Advanced Micro Devices , Inc.
Nguyen Thanh
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