Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1994-10-21
1997-04-15
Quach, T. N.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438677, H01L 21255
Patent
active
056209258
ABSTRACT:
A method of manufacturing a semiconductor device comprising the steps of forming an insulating layer on a first conductive layer deposited on a semiconductor substrate, treating the surface of the insulating layer and the exposed surface of the first conductive layer with a gas plasma containing halogen atoms, and depositing selectively a conductive material by vapor growth on the exposed surface of the first conductive layer so as to form a second conductive layer. The gas plasma containing halogen atoms can be formed by introducing a gas containing halogen atoms into the treatment chamber housing the sample, and applying high frequency power. The gas plasma containing halogen atoms can be formed by introducing a gas containing halogen atoms into the treatment chamber to adsorb the halogen atoms on the inner wall of the chamber, and applying high frequency power. Alternatively, the gas plasma can be formed by applying high frequency power after placing the sample and a halogen containing material inside the chamber. By treatment with the gas plasma containing halogen atoms, a second conductive layer can be deposited with good selectivity.
REFERENCES:
patent: 4532702 (1985-08-01), Gigante et al.
patent: 4595601 (1986-06-01), Horioka et al.
patent: 4595608 (1986-06-01), King et al.
patent: 4617087 (1986-10-01), Iyer et al.
patent: 4670967 (1987-06-01), Hazuki
patent: 4777061 (1988-10-01), Wu et al.
patent: 4902645 (1990-02-01), Ohba
patent: 4904621 (1990-02-01), Loewenstein et al.
patent: 5043299 (1991-08-01), Chang et al.
Journal of the Electrochemical Society, vol. 134, No. 1, Jan. 1987, pp. 165-175, R. Pinto et at, "Reactive ion etching in SF6 gas mixtures".
J. Dieleman, F.H.M. Sanders, Solid State Technology, p. 191, Apr. 1984; "Plasma Effluent Etching: Selective and Non-Damaging".
Wolf, S., Silicon Processing for the VLSI Era, vol. 1, pp. 388-389, 392-394, Lattice Press, 1986.
Moriya, T., A Planar Metallization Process--Its Appl. to Tri-Level Aluminum Interconnection, IEDM 83, pp. 550-553, 1983, IEEE.
Coburn, J., Plasma-Assisted Etching, Plasma Chemistry and Plasma Processing, vol. 2, No. 1, 1982, pp. 1-6.
Vossen, J., Preparation of Surfaces for High Quality Interface Formation, J. Vac. Sci. Tech. A2 (2), Jun. 1984, pp. 212-215.
Wolf, et al., Silicon Processing, vol. 1, 1986, Lattice Press, pp. 335-365, 539-582.
Endo Takashi
Itoh Hitoshi
Nakata Rempei
Watanabe Tohru
Kabushiki Kaisha Toshiba
Quach T. N.
LandOfFree
Method of manufacturing semiconductor device using a hagolen pla does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing semiconductor device using a hagolen pla, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing semiconductor device using a hagolen pla will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-360538