Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Patent
1995-03-29
1997-04-15
Bowers, Jr., Charles L.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
438275, 438981, 438303, 438762, H01L 2184
Patent
active
056209053
ABSTRACT:
In a semiconductor integrated circuit, a plurality of thin film transistors (TFTs) are formed on the same substrate having an insulating surface. Since gate electrodes formed in the TFTs are electrically insulated each other, voltages are applied independently to gate electrodes in an electrolytic solution during an anodization, to form an anodic oxide in at least both sides of each gate electrode. A thickness of the anodic oxide is changed in accordance with characteristics of the TFT. A width of high resistance regions formed in an active layer of each TFT is changed by ion doping using the anodic oxide having a desired thickness as a mask.
REFERENCES:
patent: 3935083 (1976-01-01), Tomozawa et al.
patent: 4469568 (1984-09-01), Kato et al.
patent: 4577391 (1986-03-01), Hsia et al.
patent: 5202274 (1993-04-01), Bae et al.
patent: 5212542 (1993-05-01), Okumura
patent: 5250931 (1993-10-01), Misawa et al.
patent: 5289030 (1994-02-01), Yamazaki et al.
patent: 5292675 (1994-03-01), Codama
patent: 5308998 (1994-05-01), Yamazaki et al.
patent: 5323042 (1994-06-01), Matsumoto
patent: 5403762 (1995-04-01), Takemura
patent: 5412493 (1995-05-01), Kunii et al.
patent: 5476802 (1995-12-01), Yamazaki et al.
patent: 5508209 (1996-04-01), Zhang et al.
K. Nakazawa et al., SID '90 Digest, p. 311 "LDD TFT Structure For Poly-Si LCD's".
Hiroki Masaaki
Konuma Toshimitsu
Takemura Yasuhiko
Yamamoto Mutsuo
Zhang Hongyong
Bowers Jr. Charles L.
Butts Karlton C.
Ferguson Jr. Gerald J.
Radomsky Leon
Semiconductor Energy Laboratory Co,. Ltd.
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