Method for applying a semiconductor chip to a carrier element

Details Method for applying a semiconductor chip to a carrier element Method for applying a semiconductor chip to a carrier element

2006-03-07

2006-03-07

Haran, John T. (Department: 1733)

Adhesive bonding and miscellaneous chemical manufacture

Methods

Surface bonding and/or assembly therefor

C156S275500, C438S118000

Reexamination Certificate

active

07008493

ABSTRACT:
A method is described for applying an integrated circuit to a carrier element. In which a curable compensating layer of initially paste-like consistency is coated substantially with full coverage onto a lower contact area of the integrated circuit. Whereupon the integrated circuit is joined together, by the compensating layer, with the carrier element after a relative alignment in order then to produce an electrical connection between the integrated circuit and conductor tracks of the carrier element via electrical lines surmounting the thickness of the compensating layer. Whereupon the compensating layer is cured resulting in an increased volume of the compensating layer.

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patent: 05-190705 (1993-07-01), None
patent: WO 97/27624 (1997-07-01), None
patent: WO 97/40958 (1997-11-01), None

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