Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2006-07-11
2006-07-11
Crane, Sara (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S507000, C257S510000, C438S221000
Reexamination Certificate
active
07075151
ABSTRACT:
A semiconductor memory device comprises a substrate; a first semiconductor layer of a first conduction type having a single crystalline structure isolated from the substrate by an insulator layer; a plurality of memory transistors, each having a gate electrode connected to a word line, a pair of impurity regions of a second conduction type serving as a drain region and a source region formed in the first semiconductor layer, and a channel body of the first conduction type formed in the first semiconductor layer between the impurity regions, and operative to store data as a state of majority carriers accumulated in the channel body; a plurality of device isolation regions formed to isolate memory transistors having gate electrodes commonly connected to the same word line from each other among the plurality of memory transistors; and a plurality of impurity region isolation regions formed to isolate adjacent drain regions from each other and adjacent source regions from each other, the impurity region isolation region having a smaller width than that of the device isolation region.
REFERENCES:
patent: 6965147 (2005-11-01), Shino
patent: 2004/0227248 (2004-11-01), Fukuzumi et al.
T. Ohsawa, et al., International Solid-State Circuits Conference, Digest of Technical Papers, p. 153, “Memory Design Using One-Transistor Gain Cell on SOI”, 2002.
Crane Sara
Kabushiki Kaisha Toshiba
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