Electrical computers and digital data processing systems: input/ – Input/output data processing – Flow controlling
Reexamination Certificate
2006-03-21
2006-03-21
Popovici, Dov (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Flow controlling
C710S051000, C710S058000, C365S189020, C365S189050, C365S230020
Reexamination Certificate
active
07016988
ABSTRACT:
An output buffer register includes a first input flip-flop register receiving a given number N of input signals, a latching register, a selection register, and an output multiplexer delivering N output signals. Only one data input of the enable register receives an enable signal. In this way, the propagation time at the input of the buffer register is reduced.
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Fleit Kain Gibbons Gutman Bongini & Bianco P.L.
Gutman Jose
Jorgenson Lisa K.
Popovici Dov
Schneider Joshua D
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