Method and apparatus for dynamically hiding a defect in an...

Details Method and apparatus for dynamically hiding a defect in an... Method and apparatus for dynamically hiding a defect in an...

2006-03-28

2006-03-28

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S201000

Reexamination Certificate

active

07020034

ABSTRACT:
A method and apparatus are provided for dynamically hiding a defect in a memory. In one embodiment, an entry occupied mapping includes a plurality of fields each corresponding to an entry of a memory, and during the initial test procedure of the memory the field corresponding to a defective entry is marked to make it perceived as occupied and thus the defective entry will not be used hereafter. In another embodiment, pseudo entries are selected from a backup register pool or backup memory. Each pseudo entry corresponds to a defective entry, and subsequent access to the defective entry is redirected to the corresponded pseudo entry.

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patent: 6754117 (2004-06-01), Jeddeloh

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