Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2006-04-18
2006-04-18
Chen, Kin-Chan (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S702000, C438S687000, C205S291000
Reexamination Certificate
active
07030021
ABSTRACT:
A method of fabricating a metal interconnection of semiconductor device is disclosed. A metal interconnection fabricating method according to the present invention comprises the steps of depositing a metal layer on a substrate having a predetermined structure; patterning a bottom metal layer through etching the metal layer; forming a pad electrically connecting the bottom metal layer to a scribe area; forming an insulating layer on the substrate including the bottom metal layer; forming a via hole and a trench, in which an upper metal layer is formed, on the insulating layer, the via hole connecting the bottom metal layer with the upper metal layer; forming a plating layer by means of electroplating; and performing a planarization process for the plating layer. Accordingly, the present invention needs not a separate seed layer because the bottom metal layer is used as a seed layer. In addition, the present invention can enhance device reliability by reducing electro-migration and stress-migration because the copper is uniformly grown from the bottom in one direction thereby completely filling the contact hole.
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Chen Kin-Chan
DongbuAnam Semiconductor Inc.
Pillsbury Winthrop Shaw & Pittman LLP
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