Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2006-03-07
2006-03-07
Nguyen, Cuong (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S758000
Reexamination Certificate
active
07009233
ABSTRACT:
A large area dummy pattern DL is formed in a layer underneath a target T2region formed in a scribe region SR of a wafer. A small area dummy pattern in a lower layer and a small area dummy pattern Ds2in an upper layer are disposed in a region where the inter-pattern space of a pattern (active regions L1, L2, L3, gate electrode17), which functions as an element of a product region PR and scribe region SR, is wide. The small area dummy pattern Ds2in the upper layer is offset by ½ pitch relative to the small area dummy pattern Ds in the lower layer.
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Chakihara Hiraku
Ichise Teruhisa
Kaminaga Michimoto
Uchiyama Hiroyuki
Antonelli Terry, Stout and Kraus, LLP
Hitachi ULSI System Co., Ltd.
Nguyen Cuong
Renesas Technology Corp.
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