Semiconductor device and a method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S331000, C257S340000, C257S401000

Reexamination Certificate

active

07042048

ABSTRACT:
Heightening of breakdown voltage of a trench gate type power MISFET is actualized without increasing the number of manufacturing steps. In the manufacturing method of the semiconductor device according to the present invention, p−type semiconductor region and p−type field limiting rings are formed in a gate line area simultaneously in one impurity ion implantation step so as to bring them into contact with a groove having a gate extraction electrode formed therein. Upon formation, supposing that the width of the gate extraction electrode disposed outside the groove is CHSP, and the resistivity of the n−type single crystal silicon layer1B is ρ (Ω·cm), the CHSP is set to satisfy the following equation: CHSP≦3.80+0.148ρ.

REFERENCES:
patent: 5430324 (1995-07-01), Bencuya
patent: 5578851 (1996-11-01), Hshieh et al.
patent: 6-151867 (1992-11-01), None
patent: 10-56174 (1996-08-01), None
patent: 10-173175 (1996-12-01), None
patent: 2001-168329 (1999-12-01), None
patent: 2002-231944 (2001-01-01), None
patent: 2002-353452 (2001-05-01), None

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