Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate
2006-09-19
2006-09-19
Barnie, Rexford (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S037000, C326S038000, C326S039000, C326S041000, C326S047000, C430S005000, C438S142000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C257S213000
Reexamination Certificate
active
07109751
ABSTRACT:
Methods of implementing a static memory cell compliant with the requirements of phase shift masks. A phase shift compliant memory cell is generated by implementing a single bit line, two word lines, first and second cross-coupled logic gates, and first and second pass gates. The logic gates and pass gates include transistors that use a fabrication layer (e.g., polysilicon) to implement the gate nodes of the transistors. All of these gate nodes extend substantially in a first direction. Throughout the static memory cell, the fabrication layer is implemented without T-shaped polygons in compliance with the requirements for a phase shift mask. In some embodiments, the static memory cell is a configuration memory cell for a PLD, and the method includes implementing an interconnection between at least one of the first and second storage nodes and programmable logic elements of the PLD.
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Barnie Rexford
Cartier Lois D.
White Dylan
Xilinx , Inc.
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