Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-01-10
2006-01-10
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
06986119
ABSTRACT:
A method of forming a tree structure type circuit includes the steps of dividing a division target region of LSI into a plurality of regions, placing constituent elements as distribution targets in the regions, forming a tree, conducting schematic routing, and conducting timing improvement while considering a clock skew. These processings are repeated by a preset number of times. If the repetition number reaches a specified number, the constituent elements and an added buffer or the like are subjected to detailed placement, and automatic routing is conducted.
REFERENCES:
patent: 6440780 (2002-08-01), Kimura et al.
Konno Tadashi
Saito Makoto
Sano Masahiro
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