Data reproduction apparatus

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Details

C375S355000

Reexamination Certificate

active

07023947

ABSTRACT:
A data-reproduction apparatus in which an RF signal that is input from a disk to an A/D converter via a pick-up and RF signal generator is sampled according to a sampling clock from a clock generator and converted to a sample-value series. This sample-value series is input to a phase-correction unit via a delay element, and its phase is corrected based on a phase-error signal from a phase-detection unit, then it is demodulated by a demodulator to become user data. On the other hand, the sample-value series, whose phase has been corrected, is input to a phase-detection unit where the phase error is detected, and a generated phase-error signal is then supplied to both the phase-correction unit and the clock generator. In this way a first PLL is followed by a second PLL, which makes it possible to easily widen the bandwidth of the second PLL without including a delay element in the loop.

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patent: 6047073 (2000-04-01), Norris et al.
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patent: 6408023 (2002-06-01), Abdesselem et al.
patent: 6426972 (2002-07-01), Endres et al.
patent: 6614841 (2003-09-01), Ohta
patent: 6654413 (2003-11-01), Shimoda

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