Method of building a CMOS structure on thin SOI with...

Details Method of building a CMOS structure on thin SOI with... Method of building a CMOS structure on thin SOI with...

2006-03-07

2006-03-07

Booth, Richard A. (Department: 2812)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C438S154000, C438S300000, C257S345000, C257S351000

Reexamination Certificate

active

07009258

ABSTRACT:
The present invention provides improved controllability of the lateral etch encroachment of silicon under the spacer, in light of the fact that the exemplary method, in accordance with the present invention, comprises the step of implanting neutral ions such as Ge or Ar into the source/drain regions. The implantation creates an amorphous silicon surface, and leaves a laterally extended amorphous layer under the spacer and a well defined amorphous/crystalline interface. The etch of silicon then extends laterally underneath the spacer, due to the higher etch rate of amorphous silicon and abrupt interface between amorphous and crystalline silicon.

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