Method to increase bump height and achieve robust bump...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C257S779000, C257SE23023, C257SE21508

Reexamination Certificate

active

07112522

ABSTRACT:
Methods for forming solder bumps on a semiconductor device are provided. In one embodiment, a substrate is provided having at least one contact pad formed thereon. A passivation layer is formed overlying the substrate, the passivation layer having at least one opening therein exposing a portion of the contact pad. A UBM (Under Bump Metallurgy) layer is formed overlying the passivation layer and the contact pad. A patterned and etched light sensitive layer is provided overlying the UBM layer, the light sensitive layer defining at least one opening therein. A sidewall bump layer is formed over the exposed surfaces of the light sensitive layer and the UBM layer. A portion of the sidewall bump layer above the light sensitive layer is removed. A solder material is deposited in the opening bordered by the etched sidewall bump layer to form a solder column. The solder column is then reflown to create a solder bump.

REFERENCES:
patent: 6828677 (2004-12-01), Yap et al.
patent: 2004/0005771 (2004-01-01), Fan et al.
patent: 2005/0164483 (2005-07-01), Jeong et al.
patent: 2006/0017171 (2006-01-01), Weng
patent: 2006/0076677 (2006-04-01), Daubenspeck et al.

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