Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2006-04-04
2006-04-04
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S772000, C714S723000
Reexamination Certificate
active
07024616
ABSTRACT:
A client signal having a constant bit rate is segmented every a bytes to create code information blocks. The bit rate of the client signal is increased such that the client signal has the code information block and an empty area comprised of b bytes, and the ratio c/a is equal to or higher than 110% to create a code block3comprised of c bytes. The code information block in the code block is encoded such that an error correcting code is included therein to have an encoding gain of 6 dB or higher for a bit error ratio of 10−12. Associated check bits are placed in the empty area to eventually generate a super FEC signal.
REFERENCES:
patent: 5771245 (1998-06-01), Zhang
patent: 6188335 (2001-02-01), Roth et al.
patent: 6662332 (2003-12-01), Kimmitt
patent: 0828248 (1998-03-01), None
patent: 62-221223 (1998-03-01), None
patent: WO9963540 (1999-12-01), None
Mori Takashi
Ohira Masaki
Takatori Masahiro
Alphonse Fritz
De'cady Albert
Hitachi , Ltd.
Sofer & Haroun LLP
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