Semiconductor device

Details Semiconductor device Semiconductor device

2006-01-31

2006-01-31

Nelms, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S355000, C257S357000

Reexamination Certificate

active

06992356

ABSTRACT:
In an I/O circuit unit located in the periphery of a semiconductor chip, a plurality of ESD protection transistors are provided in each I/O cell. An electrode pad cell has a two-layer structure including a lower electrode pad and an upper electrode pad. The electrode pad cell is arranged so as to be present over a connection line of ESD protection transistors of an associated I/O cell. With part of the first pad portion of an adjacent electrode pad located in an end portion of the second pad portion of the electrode pad, the second pad portion can not extend further onward but the third pad portion having a smaller width than that of the second pad portion is arranged onward. Thus, destruction of the ESD protection transistors is not caused, so that an internal circuit is protected from an electrostatic discharge which comes into electrode pads.

REFERENCES:
patent: 5892276 (1999-04-01), Miki et al.
patent: 6008542 (1999-12-01), Takamori
patent: 6236117 (2001-05-01), Ishigaki et al.
patent: P2000-164620 (2000-06-01), None

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