Semiconductor memory device with static memory cells

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S208000, C257S315000, C257S393000, C257S903000, C257S904000, C438S210000

Reexamination Certificate

active

06984859

ABSTRACT:
An access transistor, provided between a storage node in a memory cell and a bit line is formed of a P channel MOS transistor including P type first and second impurity regions formed in an N type well and a gate electrode. Buried interconnection is formed of metal having high melting point such as tungsten and provided stacked on a driver transistor formed on a main surface of a P type well and the access transistor. A polysilicon film forming a P channel TFT as a load element is formed on the buried interconnection, which is planarized, with an interlayer insulating film interposed.

REFERENCES:
patent: 5404030 (1995-04-01), Kim et al.
patent: 5818080 (1998-10-01), Kuriyama
patent: 5886375 (1999-03-01), Sun
patent: 5952678 (1999-09-01), Ashida
patent: 6380592 (2002-04-01), Tooher et al.
patent: 6483139 (2002-11-01), Arimoto et al.
patent: 7-57476 (1995-03-01), None

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