MRAM architecture with a bit line located underneath the...

Details MRAM architecture with a bit line located underneath the... MRAM architecture with a bit line located underneath the...

2006-01-03

2006-01-03

Nelms, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S422000

Reexamination Certificate

active

06982445

ABSTRACT:
A method and system for providing and using a magnetic memory are disclosed. The method and system include providing a plurality of magnetic memory cells, at least a first write line, and at least a second write line. Each of the magnetic memory cells includes a magnetic element having a top and a bottom. The first write line(s) are connected to the bottom of magnetic element of the first portion of the plurality of magnetic memory cells. The second write line(s) reside above the top of the magnetic element of each of a second portion of the magnetic memory cells. The second write line(s) are electrically insulated from the magnetic element of each of the second portion of the plurality of magnetic memory cells.

REFERENCES:
patent: 6211090 (2001-04-01), Durlam et al.
patent: 6430084 (2002-08-01), Rizzo et al.
patent: 6538920 (2003-03-01), Sharma et al.
patent: 6740947 (2004-05-01), Bhattacharyya et al.
patent: 6788605 (2004-09-01), Sharma et al.
patent: 2004/0191928 (2004-09-01), Shi

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