Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2006-03-28
2006-03-28
Cao, Phat X. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S903000, C257S368000
Reexamination Certificate
active
07019369
ABSTRACT:
In an SRAM, memory cells are each constructed of four NMOS transistors and two PMOS transistors25and26.The four NMOS transistors are each constructed of DTMOS in which the channel region is electrically connected to the gate. In each NMOS transistor, a threshold voltage Vth is lower in an ON stage than in an OFF stage. The threshold voltage Vth in the OFF stage is equivalent to that of an ordinary NMOS transistor in which the channel region is not electrically connected to the gate. Read and write circuits of the SRAM also include MOS transistors formed of DTMOS in which the channel region is electrically connected to the gate.
REFERENCES:
patent: 5780899 (1998-07-01), Hu et al.
patent: 5831897 (1998-11-01), Hodges
patent: 5831899 (1998-11-01), Wang et al.
patent: 5960289 (1999-09-01), Tsui et al.
patent: 6020222 (2000-02-01), Wollesen
patent: A-54-037544 (1979-03-01), None
patent: A-61-185972 (1986-08-01), None
patent: 3022476 (1991-01-01), None
patent: A-04-053090 (1992-02-01), None
patent: A-07-161844 (1995-06-01), None
patent: A-07-176633 (1996-05-01), None
patent: A-10-222985 (1998-08-01), None
Hodges et al. “Analysis and Design of Integrated Circuits” 1988, McGraw-Hill pp368,369.
“Principles of CMOS VLSI Design”, A Systems Perspective, Second Edition, , Neil H.E. Weste and Kamran Eshraghian, Chapter 10, pp 578-583, 1992.
F. Assaderaghi et al., “Dynamic threshold-voltage MOSFET (DTMOS) for ultra-low voltage VLSI”, IEEE Transactions on Electron Devices, vol. 44, No. 3, pp. 414-422, Mar. 1997.
Assaderaghi et al., 1994 “A dynamic threshold voltage MOSFET (DTMOS) for very low voltage operation” IEEE Electron Device Letters vol. 15, pp 510-512.
Andoh et al., 1994 “Design methodology for low-voltage MOSFETS” IEEE International Electron Devices Meeting, Technical Digest, pp 79-82.
Assaderaghi et al., 1994 “A dynamic threshold voltage MOSFET (DTMOS) for ultra-low voltage operation” IEEE International Electron Devices Meeting, Technical Digest, pp 809-812.
David A. Hodges et al., “Analysis and design of digital integrated circuits”, second edition, McGraw-Hill, Inc., pp 368-369; 1988.
Cao Phat X.
Sharp Kabushiki Kaisha
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