Method of manufacturing a semiconductor device

Details Method of manufacturing a semiconductor device Method of manufacturing a semiconductor device

2006-07-04

2006-07-04

Lin, Sun James (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07073147

ABSTRACT:
Wirings connected to a gate electrode of a slave switch circuit cell for substrate bias circuits are respectively electrically connected to a wiring for a power supply potential and a wiring for a reference potential. Thus, the switch operation of the slave switch circuit cell is made invalid. Wirings connected to n wells of respective circuit cells are electrically connected to a wiring for the power supply potential, and wirings connected to p wells of the respective circuit cells are electrically connected to the wiring. Thus, the n wells are fixed to the power supply potential, and the p wells are fixed to the reference potential.

REFERENCES:
patent: 6194915 (2001-02-01), Nakayama et al.
patent: 6337593 (2002-01-01), Mizuno et al.
patent: 6340825 (2002-01-01), Shibata et al.
patent: 6462978 (2002-10-01), Shibata et al.
patent: 97/21247 (1997-06-01), None

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