Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2006-09-19
2006-09-19
Abraham, Fetsum (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S351000
Reexamination Certificate
active
07109554
ABSTRACT:
In a semiconductor device having an N-channel MOS transistor and a P-channel MOS transistor, each of the N-channel and P-channel MOS transistors is made up of a polycrystal silicon layer, a gate insulating film, and a gate electrode containing a gate polysilicon on a glass substrate. A method of manufacturing the semiconductor device includes the steps of injecting an impurity into the gate polysilicon at a same time as or in a different step of impurity injection at a time of formation of source/drains of the MOS transistors or formation of an LDD (Lightly Doped Drain), to make an N-type of a gate polysilicon in the N-channel MOS transistor and make a P-type of a gate polysilicon in the P-channel MOS transistor and, furthermore, setting a thickness of the polycrystal silicon layer less than the width of a depletion layer which occurs when an inversion channel is formed. Thus, fluctuations in values of threshold voltages of the MOS transistors are reduced to realize low-voltage driving.
REFERENCES:
patent: 4933298 (1990-06-01), Hasegawa
patent: 5116771 (1992-05-01), Karulkar
patent: 5185280 (1993-02-01), Houston et al.
patent: 5391903 (1995-02-01), Strater et al.
patent: 5648277 (1997-07-01), Zhang et al.
patent: 5904509 (1999-05-01), Zhang et al.
patent: 6259138 (2001-07-01), Ohtani et al.
patent: 6323071 (2001-11-01), Zhang et al.
patent: 6693044 (2004-02-01), Yamazaki et al.
patent: S58-028871 (1983-02-01), None
patent: S59-213156 (1984-12-01), None
patent: 60-47467 (1985-03-01), None
patent: H01-310574 (1989-12-01), None
patent: H06-268215 (1994-09-01), None
patent: 8-107153 (1996-04-01), None
patent: H08-293610 (1996-11-01), None
patent: 2001-017507 (2001-03-01), None
patent: 2001-090590 (2001-10-01), None
“High Performance Low Temperature Metal-Induced Unilaterally Crystallized Poly-Silicon TFT for System-on-Panel Applications”, IEEE, IEEE Transactions on Electron Devices, vol. 47, No. 2, Feb. 2000, pp. 404-409.
“Ultra-Thin Elevated Channel Poly-Si TFT Technology for Fully-Integrated AMLCD System on Glass”, IEEE, IEEE Transactions on Electron Devices, vol. 47, No. 3, Mar. 2000, pp. 569-575.
Characteristics of Poly-Si TFT Fabricated by Excimer Laser Annealing Method, IEEE, IEEE Transactions on Electron Devices, vol. 41, No. 10, Oct. 1994, pp. 1876-1879.
Abraham Fetsum
NEC Corporation
Sughrue & Mion, PLLC
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