Register file apparatus and method incorporating...

Details Register file apparatus and method incorporating... Register file apparatus and method incorporating...

2006-03-14

2006-03-14

Elms, Richard (Department: 2824)

Static information storage and retrieval

Read/write circuit

Including specified plural element logic arrangement

C365S233500, C365S189040

Reexamination Certificate

active

07012839

ABSTRACT:
A register file apparatus and method incorporating read-after-write blocking using detection cells provides improved read access times in high performance register files. One or more detection cells identical to the register file cells and located in the register file array are used to control the read operation in the register file by configuring the detection cells to either alternate value at each write or change to a particular value after a write and then detecting when the write has completed by detecting the state change of an active detection cell. The state change detection can be used to delay the leading edge of a read strobe or may be used in the access control logic to delay generation of a next read strobe. The register file thus provides a scalable design that does not have to be tuned for each application and that tracks over voltage and clock skew variation.

REFERENCES:
patent: 5594691 (1997-01-01), Bashir
patent: 5825689 (1998-10-01), Wakita

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