Arrangement with a memory for storing data

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

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C365S189020

Reexamination Certificate

active

07079431

ABSTRACT:
An arrangement with a memory for storing data has a first memory for storing data, switching devices which stipulate whether access to the first memory involves output of the data stored in the first memory or other data, and a second memory for storing the other data. The arrangement is distinguished in that it contains a third memory (103, 203, 310), which is addressed by the address (A) which is used to access the first memory or by a portion (AH) of this address and contains information about which data in the first memory are to be replaced with other data.

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IBM Technical Disclosure Bulletin; vol. 37, No. 06A; “Bit Sparing Logic for Semiconductor Memory Systems”.

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