Nonvolatile semiconductor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S316000, C257S317000

Reexamination Certificate

active

07026684

ABSTRACT:
Floating gates and control gates are alternately arranged on a substrate periodically in a first direction via a gate insulation film. Each floating gate has a first portion whose sectional shape is rectangular, and a second portion which is positioned substantially in a middle portion of the first portion and whose sectional shape is rectangular and whose length in a direction parallel to the first direction is smaller than that of the first portion. Each control gate has a third portion between the second portions of a pair of adjacent floating gates, and a fourth portion positioned between the first portions of a pair of adjacent floating gates. The floating gate and a pair of control gates positioned on opposite sides of the floating gate constitute one memory cell, the adjacent memory cells share the control gate positioned between the memory cells.

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U.S. Appl. No. 10/648,510, filed Aug. 27, 2003, Fumitaka Arai et al.
U.S. Appl. No. 10/832,381, filed Apr. 27, 2004, Koji Sakui et al.
Y. Sasago, et al. “10-MB/sMulti-Level Programming of Gb-Scale Flash Memory Enabled by New AG-AND Cell Technology”, IEEE IEDM, 2002, pp. 952-954.

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