Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate
2006-03-14
2006-03-14
Phung, Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
C365S189070, C365S189110
Reexamination Certificate
active
07012842
ABSTRACT:
An enhanced method of writing and reading a memory device, such as an SRAM using negative differential resistance (NDR) elements), is disclosed. This is done through selective control of biasing of the active elements in a memory cell. For example in a write operation, a memory cell is placed in an intermediate state to increase write speed. In an NDR based embodiments, this is done by reducing a bias voltage to NDR FETs so as to weaken the NDR element (and thus disable an NDR effect) during the write operation. Conversely, during a read operation, the bias voltages are increased to enhance peak current (as well as an NDR effect), and thus provide additional current drive to a BIT line. Embodiments using such procedures achieve superior peak to valley current ratios (PVR), read/write speed, etc.
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Shao, Z.
Bever Hoffman & Harms LLP
Kubodera John M.
Nguyen Hien
Phung Anh
Progressant Technologies, Inc.
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