Semiconductor memory device

Static information storage and retrieval – Read/write circuit – Differential sensing

Reexamination Certificate

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C365S191000

Reexamination Certificate

active

06982914

ABSTRACT:
A semiconductor memory device includes a replica circuit including a plurality of replica cells (RMC) having the same elements as those of memory cells in a memory array and outputting signals with levels in the stage number to a common replica bit line, and a sense amplifier control circuit for receiving a signal of the replica bit line to control a timing of a signal SAE for starting a sense amplifier circuit. The replica circuit includes a switching circuit (SW) for switching the stage number of the replica cells to be activated among the plurality of replica cells in a programmable manner.

REFERENCES:
patent: 5268869 (1993-12-01), Ferris et al.
patent: 6172925 (2001-01-01), Bloker
patent: 6490214 (2002-12-01), Kawasumi
patent: 6556472 (2003-04-01), Yokozeki
patent: 6603687 (2003-08-01), Jun et al.

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