Memory device with built-in error-correction capabilities

Details Memory device with built-in error-correction capabilities Memory device with built-in error-correction capabilities

2006-07-18

2006-07-18

Tran, Michael (Department: 2818)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S230030

Reexamination Certificate

active

07079430

ABSTRACT:
A semiconductor memory device having built-in error-correction capabilities, which comprises a primary array containing a plurality of memory cells; a redundancy array containing at least one replacement cell for replacing at least one defective cell in the primary array, wherein the defective cell is identified by a control signal and the control signal varies according to a defective state of the defective cell over time; and a switching circuit comprising a reprogrammable logic array that is coupled to the primary array and the redundancy array for receiving the control signal to switch a cell signal of the defective cell to the replacement cell.

REFERENCES:
patent: 5161157 (1992-11-01), Owen et al.
patent: 6091258 (2000-07-01), McClintock et al.
patent: 6252808 (2001-06-01), Yoo
patent: 6643197 (2003-11-01), Chen et al.

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