Integrated circuit memory devices that support selective...

Details Integrated circuit memory devices that support selective... Integrated circuit memory devices that support selective...

2006-09-05

2006-09-05

Nguyen, Tuan T. (Department: 2824)

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

C365S233100, C365S189120

Reexamination Certificate

active

07102958

ABSTRACT:
A memory module may include a plurality of memory devices coupled to a memory controller over a same command/address bus. Methods of controlling such a memory module may include providing a mode register set command from the memory controller to each of the integrated circuit memory devices over the command/address bus during a mode register set operation. A disable signal may be provided from the memory controller to a first one of the integrated circuit memory devices over a signal line between the memory controller and the first integrated circuit memory device to thereby disable implementation of the mode register set command for the first integrated circuit memory device during the mode register set operation. An enable signal may be provided from the memory controller to a second one of the integrated circuit memory devices over a signal line between the memory controller and the second integrated circuit memory device to thereby enable implementation of the mode register set command for the second integrated circuit memory device during the mode register set operation. Moreover, the disable signal may not be provided to the second integrated circuit memory device during the mode register set operation, and the enable signal may not be provided to the first integrated circuit memory device during the mode register set operation. Related systems, devices and additional methods are also discussed.

REFERENCES:
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patent: 6493394 (2002-12-01), Tamura et al.
patent: 6502212 (2002-12-01), Coyle et al.
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patent: 6665222 (2003-12-01), Wright et al.
patent: 2003-0008327 (2003-01-01), None
Notice to Submit a Response for Korean Patent Application No. 2003-0008327 mailed on Mar. 27, 2006.

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