Vertical semiconductor device and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S330000, C257S335000, C257S347000, C257S331000, C257S332000, C257S513000

Reexamination Certificate

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07009239

ABSTRACT:
A semiconductor device includes an n-type semiconductor substrate (1) including a p-type collector layer (2) formed in a second main surface side thereof, a trench (13) is formed in a peripheral portion of the semiconductor substrate (1) so as to surround the inside and reach the collector layer (2) from a first main surface of the semiconductor substrate (1), and a p-type isolation region (14) formed by diffusion from a sidewall of the trench (13) is provided to be connected to the collector layer (2). The trench (13) is filled with a filling material (16).

REFERENCES:
patent: 4976532 (1990-12-01), Nyman
patent: 5065212 (1991-11-01), Ohata et al.
patent: 5626268 (1997-05-01), Kolton et al.
patent: 6642600 (2003-11-01), Narazaki et al.
patent: 2002/0130362 (2002-09-01), Park
patent: 1 227 522 (2002-07-01), None
patent: 1 267 415 (2002-12-01), None
patent: 2001-185727 (2001-07-01), None
patent: 2002-319676 (2002-10-01), None
Patent Abstracts of Japan, JP 2001-185727, Jul. 6, 2001.

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