Data transfer control device

Details Data transfer control device Data transfer control device

2006-05-09

2006-05-09

Myers, Paul R. (Department: 2112)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S118000

Reexamination Certificate

active

07043595

ABSTRACT:
Even when an S-PCI bus1brequests transfer while a P-PCI bus1ais executing burst transfer, assert of a TRDY# signal for data transfer of the P-PCI side is delayed so that next data transfer of the P-PCI side is completed within 8 clock cycles since the TRDY# signal for data transfer of the P-PCI side is asserted.

REFERENCES:
patent: 4922244 (1990-05-01), Hullett et al.
patent: 5905878 (1999-05-01), LaBerge
patent: 6044207 (2000-03-01), Pecone et al.
patent: 6078976 (2000-06-01), Obayashi
patent: 6910088 (2005-06-01), LaBerge
PCI Local Bus Specification Revision 2.2 Dec. 18, 1998.
EP440 PCI-to-PCI Bridge copyright 2000.

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