Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate
2006-07-11
2006-07-11
Decady, Albert (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Replacement of memory spare location, portion, or segment
C714S025000, C365S225700
Reexamination Certificate
active
07076700
ABSTRACT:
Faulty memory cells in a plurality of memory blocks are replaced by redundant memory cells. Each block includes plurality of first and second redundant address lines with assigned memory cells. The first redundant address lines of a block can be used in at least one other memory block. A fault image is determined and the memory is reconfigured so as to replace faulty memory cells. If one or more first redundant address lines with faulty memory cells have been displaced from one block to another block, the displaced first redundant address line with faulty memory cells is assigned to the other block. It is then determined whether the fault image is covered by the reconfiguration taking account of the assignment. If the fault image is covered, the reconfiguration is output as a valid solution.
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De'cady Albert
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Stemer Werner H.
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