Cache programmable to partition ways to agents and/or...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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C711S128000, C365S049130

Reexamination Certificate

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06988168

ABSTRACT:
A cache comprises a memory including a plurality of entries and a circuit. Each entry of the plurality of entries is configured to store a cache block. The circuit is configured to select a first entry of the plurality of entries to store a first cache block. In one implementation, the first cache block corresponds to a first transaction initiated by a first agent, wherein the first entry is selected from a first subset of the plurality of entries indicated as selectable for the first agent. In another implementation, the circuit is configured to select the first entry of the plurality of entries in response to whether the first cache block is a remote cache block or a local cache block. In other implementations, the circuit may be configured to handle a combination of the above.

REFERENCES:
patent: 3693165 (1972-09-01), Reiley et al.
patent: 4044338 (1977-08-01), Wolf
patent: 4371929 (1983-02-01), Brann et al.
patent: 4453212 (1984-06-01), Gaither et al.
patent: 4511994 (1985-04-01), Webb et al.
patent: 4575792 (1986-03-01), Keeley
patent: 4633440 (1986-12-01), Pakulski
patent: 4654778 (1987-03-01), Chiesa et al.
patent: 4807115 (1989-02-01), Torng
patent: 4833642 (1989-05-01), Ooi
patent: 4858105 (1989-08-01), Kuriyama et al.
patent: 4907278 (1990-03-01), Cacinati et al.
patent: 4996641 (1991-02-01), Talgam et al.
patent: 5113514 (1992-05-01), Albonesi et al.
patent: 5125083 (1992-06-01), Fite et al.
patent: 5163142 (1992-11-01), Mageau
patent: 5193163 (1993-03-01), Sanders et al.
patent: 5226126 (1993-07-01), McFarland et al.
patent: 5226130 (1993-07-01), Favor et al.
patent: 5241663 (1993-08-01), Rohwer
patent: 5303362 (1994-04-01), Butts, Jr. et al.
patent: 5317716 (1994-05-01), Liu
patent: 5325504 (1994-06-01), Tipley et al.
patent: 5353425 (1994-10-01), Malamy et al.
patent: 5369753 (1994-11-01), Tipley
patent: 5377345 (1994-12-01), Chang et al.
patent: 5410669 (1995-04-01), Biggs et al.
patent: 5416783 (1995-05-01), Broseghini et al.
patent: 5432918 (1995-07-01), Stamm
patent: 5450551 (1995-09-01), Amini et al.
patent: 5471598 (1995-11-01), Quattromani et al.
patent: 5487162 (1996-01-01), Tanaka et al.
patent: 5493667 (1996-02-01), Huck et al.
patent: 5510934 (1996-04-01), Brennan et al.
patent: 5526510 (1996-06-01), Akkary et al.
patent: 5539878 (1996-07-01), Kikinis
patent: 5551001 (1996-08-01), Cohen et al.
patent: 5557763 (1996-09-01), Senter et al.
patent: 5564034 (1996-10-01), Miyake
patent: 5584014 (1996-12-01), Nayfeh et al.
patent: 5586253 (1996-12-01), Green et al.
patent: 5588126 (1996-12-01), Abramson et al.
patent: 5592679 (1997-01-01), Yung
patent: 5638537 (1997-06-01), Yamada et al.
patent: 5644752 (1997-07-01), Cohen et al.
patent: 5668815 (1997-09-01), Gittinger et al.
patent: 5668972 (1997-09-01), Liu et al.
patent: 5671444 (1997-09-01), Akkary et al.
patent: 5748640 (1998-05-01), Jiang et al.
patent: 5752261 (1998-05-01), Cochcroft, Jr.
patent: 5761712 (1998-06-01), Tran et al.
patent: 5768555 (1998-06-01), Tran et al.
patent: 5778429 (1998-07-01), Sukegawa et al.
patent: 5784588 (1998-07-01), Leung
patent: 5787490 (1998-07-01), Ozawa
patent: 5802338 (1998-09-01), Rechtschaffen et al.
patent: 5809528 (1998-09-01), Miller et al.
patent: 5809531 (1998-09-01), Brabandt
patent: 5875465 (1999-02-01), Kilpatrick et al.
patent: 5897651 (1999-04-01), Cheong et al.
patent: 5898849 (1999-04-01), Tran
patent: 5913224 (1999-06-01), MacDonald
patent: 5937431 (1999-08-01), Kong et al.
patent: 5974507 (1999-10-01), Arimilli et al.
patent: 5974508 (1999-10-01), Maheshwari
patent: 5983321 (1999-11-01), Tran et al.
patent: 6026461 (2000-02-01), Baxter et al.
patent: 6115792 (2000-09-01), Tran
patent: 6148370 (2000-11-01), Kobayashi
patent: 6161167 (2000-12-01), Witt
patent: 6185657 (2001-02-01), Moyer
patent: 6185703 (2001-02-01), Guddat et al.
patent: 6240432 (2001-05-01), Chuang et al.
patent: 6240532 (2001-05-01), Cho
patent: 6263082 (2001-07-01), Ishimoto et al.
patent: 6266743 (2001-07-01), Carpenter et al.
patent: 6269427 (2001-07-01), Kuttanna et al.
patent: 6279083 (2001-08-01), MacDonald
patent: 6295584 (2001-09-01), DeSota et al.
patent: 6295608 (2001-09-01), Parkes et al.
patent: 6351789 (2002-02-01), Green
patent: 6405287 (2002-06-01), Lesartre
patent: 6430655 (2002-08-01), Courtright et al.
patent: 6519690 (2003-02-01), Quimby
patent: 0 061 570 (1982-10-01), None
patent: 0 259 095 (1988-03-01), None
patent: 325 420 (1989-07-01), None
patent: 0 381 471 (1990-08-01), None
patent: 0 436 092 (1991-07-01), None
patent: 0 459 232 (1991-12-01), None
patent: 0 459 233 (1991-12-01), None
patent: 569 221 (1993-11-01), None
patent: 0 687 979 (1995-12-01), None
patent: 997 821 (2000-05-01), None
patent: 03010901.1 (2003-09-01), None
patent: 2 214 336 (1989-08-01), None
patent: 2 263 985 (1993-08-01), None
patent: 2 263 987 (1993-08-01), None
patent: 2 281 422 (1995-03-01), None
Dekker et al., “A Realistic Fault Model and Test Algorithms for Static Random Access Memories,” IEEE Transactions on Computer-Aided Design, vol. 9, No. 6, Jun. 1990, pp. 567-572.
Stepanian, SiByte, SiByte SB-1 MIPS64 CPU Core, Embedded Processor Forum 2000, Jun. 13, 2000, 15 pages.
Halfhill et al., “SiByte Reveals 64-bit Core for NPUs,” Microprocessor Report, Jun. 2000, pp. 45-48.
Intel® StrongARM® SA-1100 Microprocessor, Developer's Manual, Aug. 1999, © Intel Corporation, Ch. 1, p. 6; Ch. 2, p. 2; Ch. 6, pp. 2-5; Ch. 7, p. 3.
Cyrix® 5×86 Microprocessor, Jul. 1995, 8 pgs.
Cyrix® 6×86 Microprocessor, Aug. 1995, 6 pgs.
“Memory Arbitration with Out of Order Execution in Conjunction with a RISC System,” IBM Technical Disclosure Bulletin, Sep. 1992, pp. 62-64.
“Handling Reservations in Multiple-Level Cache,” IBM Technical Disclosure Bulletin, Dec. 1993, pp. 441-446.
Hollenbeck, et al., “PA3700LC Integrates Cache for Cost/Performance,” Hewlett Packard Company, IEEE, 1996, pp. 167-174.
Gallup, et al., “Testability Features of the 68040,” Motorola, Inc., 1990 International Test Conference, IEEE, pp. 749-757.

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