Nonvolatile semiconductor memory device having adjacent...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S315000

Reexamination Certificate

active

07071511

ABSTRACT:
A semiconductor memory device comprising a semiconductor substrate, a plurality of cell transistors provided on the substrate, a plurality of selection gates provided on the substrate, and element-isolation regions provided between the cell transistors and between the selection gates. Each cell transistor has a floating gate provided on a gate insulating film provided on the substrate, a source and drain provided in the substrate and aligned with the sides of the floating gate, an inter-gate insulating film provided on one side of the floating gate, and a control gate provided on the inter-gate insulating film and laying over the one side of the floating gate. The selection gates are connected by conductive members which are provided on the gate insulating film and embedded in the selection gates.

REFERENCES:
patent: 6191975 (2001-02-01), Shimizu et al.
patent: 6835987 (2004-12-01), Yaegashi
patent: 2004/0164340 (2004-08-01), Fumitaka et al.
patent: 11-145429 (1999-05-01), None
patent: 2002-50703 (2002-02-01), None
patent: 2002-217318 (2002-08-01), None
Y, Sasago, et al., “10-MB/s Multi-Level Programming of Gb-Scale Flash Memory Enabled by New AG-AND Cell Technology”, 2002 IEEE, 952-IEDM, 21.6.1, 2002, 3 Pages.

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