Method and apparatus for designing layout, and computer product

Details Method and apparatus for designing layout, and computer product Method and apparatus for designing layout, and computer product

2006-07-18

2006-07-18

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S116000, C716S116000

Reexamination Certificate

active

07080338

ABSTRACT:
A layout designing apparatus includes an input unit that receives an input of a frame having a boundary scan register, a placing unit that places an I/O macro to be connected to a signal terminal for propagating other signal than a test signal in an arbitrary I/O macro placement area of the frame input, a determining unit that determines whether a frame terminal at an arbitrary terminal position in the frame matches with at least one of a test terminal for propagating the test signal in the frame input and a signal terminal to be connected to the I/O macro placed, and a replacing unit that replaces, based on a result of determining by the determining unit, the I/O macro placed with either of a shared I/O macro and a test-only I/O macro.

REFERENCES:
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patent: 2005/0097416 (2005-05-01), Plunkett
patent: 2002-026129 (2002-01-01), None

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