Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-07-25
2006-07-25
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
07082593
ABSTRACT:
The present invention is directed to a method and apparatus of IC implementation based on a C++ language description. In an exemplary aspect of the present invention, a method for evaluating a C++ description by an IC includes the following steps. First, a C++ description including a C++ program is provided. Then, the C++ program is stored in a first memory module (e.g., a ROM, or the like) of an IC. Next, a scalar input and/or an input array may be provided to the IC. Then, the C++ program may be executed by a control device module of the IC. Next, a scalar output and/or an output array may be read from the IC.
REFERENCES:
patent: 5537329 (1996-07-01), Feldmann et al.
patent: 5764531 (1998-06-01), Kojima et al.
patent: 5926397 (1999-07-01), Yamanouchi
patent: 6425110 (2002-07-01), Hathaway et al.
Andreev Alexander E.
Nikitin Andrey A.
Bowers Brandon
LSI Logic Corporation
Suiter - West - Swantz PC LLO
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