MRAM array having a segmented bit line

Static information storage and retrieval – Systems using particular element – Magnetoresistive

Reexamination Certificate

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C365S189011, C365S171000

Reexamination Certificate

active

06982902

ABSTRACT:
A magneto-resistive random access memory (MRAM) array comprises global bit lines segmented using a plurality of local bit lines. A read/write controller is connected to the switches. Switches couple the global bit line to the local bit lines. The MRAM array has low leakage currents and facilitates a high signal-to-noise (S/N) ratio of read and write operations.

REFERENCES:
patent: 6272041 (2001-08-01), Naji
patent: 6351413 (2002-02-01), Micheloni et al.
patent: 6741495 (2004-05-01), Kunikiyo et al.
patent: 2004/0264239 (2004-12-01), Tsang

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