Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-09-12
2006-09-12
Kim, Matthew (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S118000, C711S128000, C711S130000, C711S146000
Reexamination Certificate
active
07107408
ABSTRACT:
According to the present invention, methods and apparatus are provided for increasing the efficiency of data access in multiple processor, multiple cluster systems. A cache coherence controller associated with a first cluster of processors can determine whether speculative probing can be performed before forwarding a data access request to a second cluster. The cache coherence controller can also forward the data access request to the second cluster before receiving a probe response.
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Beyer Weaver & Thomas LLP
Kim Matthew
Li Zhuo H.
Newisys Inc.
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