Semiconductor integrated circuit having programmable delays...

Details Semiconductor integrated circuit having programmable delays... Semiconductor integrated circuit having programmable delays...

2006-09-26

2006-09-26

Nguyen, VanThu (Department: 2824)

Static information storage and retrieval

Read/write circuit

Signals

C365S189050, C365S233100

Reexamination Certificate

active

07113434

ABSTRACT:
In a semiconductor integrated circuit device that includes macro cells (circuit blocks that can be designed independently) such as a storage circuit and operates synchronously with an external clock, total delay time from signal input to output is reduced and the speed of operation is increased. In the semiconductor integrated circuit device which has plural circuit blocks coupled in series for signal transmission and whose whole operation is controlled by a clock signal, the semiconductor integrated circuit device including first circuit blocks that receive input signals in response to a first timing signal based on a clock signal, and a second circuit block that forms output signals in response to a second timing signal based on the clock signal, a time difference between the first timing signal and the second timing signal is set to a non-integral multiple of the cycle of the clock signal.

REFERENCES:
patent: 6108266 (2000-08-01), Weier et al.
patent: 6125064 (2000-09-01), Kim et al.
patent: 6229757 (2001-05-01), Nagata et al.
patent: 6417715 (2002-07-01), Hamamoto et al.
patent: 6-52676 (1994-02-01), None

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