Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-09-05
2006-09-05
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07103866
ABSTRACT:
To design a chip having a plurality of circuit areas driven by different power supplies, a boundary cell to be inserted on the boundary between the circuit areas is prepared. After creating a logic circuit netlist with a design tool, the boundary cell is inserted on the boundary. The boundary cell is connected on a signal transmission path between the circuit areas. A circuit for suppressing shoot-through current or leakage current is used as the boundary circuit. By preparing the boundary cell in a cell library, chip design is facilitated.
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patent: 2001-148625 (2001-05-01), None
Kashiwagi Yoshiki
Katoh Tetsuya
Chiang Jack
NEC Electronics Corporation
To Tuyen
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