Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1991-12-23

1993-03-16

James, Andrew J.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257382, H01L 2710, H01L 2348

Patent

active

051947528

ABSTRACT:
For increasing pattern density of cell regions in a semiconductor memory device including an array of dynamic memory cells, the cell regions for cell transistor pairs are provided in a semiconductor substrate so as to be crossed by one desired bit line and two word lines adjacent thereto, and the patterns of cell regions have a same direction. Contacts for electrically connecting each bit line to common regions of cell transistor pairs are provided on respective bit lines every desired pitch at positions where each bit line intersects with cell regions. These contacts of adjacent bit lines are successively shifted in a bit line direction by approximately 1/2.sup.n pitch (n is natural numbers greater than or equal to 2).

REFERENCES:
patent: 4125854 (1978-11-01), McKenny et al.
patent: 4291391 (1981-09-01), Chatterjee et al.
patent: 4460911 (1984-07-01), Salters
patent: 4476547 (1984-10-01), Miyasaka
patent: 4649406 (1987-03-01), Takemae
patent: 4700328 (1987-10-01), Burghard
patent: 4710897 (1987-12-01), Masuoka
patent: 4941031 (1990-07-01), Kamagai et al.
International Electron Devices Meeting Technical Digest Dec. 11-14, 1988.

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