Universal serial bus circuit and data structure

Details Universal serial bus circuit and data structure Universal serial bus circuit and data structure

2006-03-28

2006-03-28

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07020851

ABSTRACT:
A USB circuit that can prevent phase difference between a signal pair with high precision without the need for strict design conditions. In a preferred embodiment of this USB circuit, the USB controller thereof comprises a flip-flop pair to match the timings of a signal pair output to an output signal line pair and a flip-flop pair to match the timings of a signal pair input from an input signal line pair, and the USB driver thereof comprises a third flip-flop pair to match the timings of a signal pair input from the output signal line pair, and a fourth flip-flop pair to match the timings of a signal pair output to the input signal line pair.

REFERENCES:
patent: 6757763 (2004-06-01), Preiss et al.
patent: 6816994 (2004-11-01), Schoenfeld et al.
patent: 09-139731 (1997-05-01), None
patent: 10-56362 (1998-02-01), None
patent: 10-301899 (1998-11-01), None
patent: 2000-183920 (2000-06-01), None
patent: 2000-307561 (2000-11-01), None

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