Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2006-04-04
2006-04-04
Anderson, Matthew D. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C365S049130
Reexamination Certificate
active
07024516
ABSTRACT:
A Ternary/Content Addressable Memory (T/CAM) design is presented. The CAM includes a rule table implemented using a Random Access Module (RAM) storing n rule entries. An n-to-1 multiplexer module, responsive to a value C of a cycle counter, varying between 0 to n-1, provides a selected C'th rule entry to a comparator block which performs a comparison between the selected C'th rule entry and a matching key. The resulting comparison result together with the value C are used to decode the matched rule. In implementing a TCAM, a bitmask table implemented using a RAM module storing n bitmask entries is used. An n-to-1 multiplexer module, responsive to the value C provides a corresponding C'th bitmask to a masking module which modifies the comparison result to ignore a subgroup of results of bitwise comparisons between the C'th rule entry and the matching key. T/CAM implementations adhering to the described embodiment support comparison of the matching key against a number of N masked rules using masked comparison hardware of size m, where m is much smaller than N. Advantages are derived from the provision of a flexible rule-based classification, filtering and verification packets conveyed in accordance with various packet transport protocols at wire-speed in support of VoIP provisioning. The flexibility is especially beneficial in implementing convergent applications.
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Anderson Matthew D.
Laubscher, Jr. Lawrence E.
Zarlink Semiconductor Limited
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