Semiconductor integrated circuit device

Electronic digital logic circuitry – Interface – Supply voltage level shifting

Reexamination Certificate

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Details

C326S083000, C327S534000

Reexamination Certificate

active

06906551

ABSTRACT:
A semiconductor integrated circuit device comprising a logical circuit including a MIS transistor formed on a semiconductor substrate, a control circuit for controlling a threshold voltage of the MIS transistor forming the logical circuit, an oscillation circuit including a MIS transistor formed on the semiconductor substrate, the oscillation circuit being constructed so that the frequency of an oscillation output thereof can be made variable, and a buffer circuit, in which the control circuit is supplied with a clock signal having a predetermined frequency and the oscillation output of the oscillation circuit so that the control circuit compares the frequency of the oscillation output and the frequency of the clock signal to output a first control signal, the oscillation circuit is controlled by the first control signal so that the frequency of the oscillation output corresponds to the frequency of the clock signal, the control of the frequency of the oscillation output being performed in such a manner that the first control signal controls a threshold voltage of the MIS transistor forming the oscillation circuit, and the buffer circuit is constructed so that it is inputted with the first control signal to output a second control signal corresponding to the first control signal, the second control signal controlling the threshold voltage of the MIS transistor forming the logical circuit.

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Translation of Final Decision of Rejection, Issue No. 188982, Issue Date Jun. 1, 2004; Patent Application No. Hei 8-349427.
English Translation of Japanese Office Action dated Feb. 24, 2004.

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